Component Analysis

Analyze a model, subsystem, or subchart

If you have an existing design model in Simulink^®, see Component Selection to configure portions of your design for Simulink Design Verifier™ analysis. You perform iterative analysis as you update your model.

Functions

`sldvcompat`	Check model for compatibility with analysis
`sldvoptions`	Create design verification options object
`sldvrun`	Analyze model

Topics

Basic Workflow for Simulink Design Verifier
Overview of the basic Simulink Design Verifier workflow.
Model Representation for Analysis
Describes model representation that Simulink Design Verifier uses for analysis.
Configure Model Representation Options
Describes how to configure model representation options. Simulink Design Verifier uses for analysis.
Share Simulink Cache File for Faster Analysis
Use Simulink cache files to share and reuse the model representation for analysis.
Extend Existing Test Cases by Reusing Model Representation
Reanalyze a model by reusing the model representation.
Filter Objectives by Using Analysis Filter Viewer
Describes the filtering of objectives by using Analysis Filter viewer.

Featured Examples

Run Additional Analysis to Reduce Instances of Rational Approximation

Reduce the instances of rational approximation by running additional analysis. You analyze a model and during the analysis, Simulink® Design Verifier™ identifies the presence of approximations and the associated objectives are reported as undecided with test case.

Open Script

Detect Design Errors in an AUTOSAR Software Component Model

Perform unit-testing to detect design errors in an AUTOSAR component.

Open Live Script