Main Content

displayTriggerSettings

Display overall trigger condition

Description

displayTriggerSettings(DC) displays the signal value comparisons and logical operator that define the overall trigger condition in trigger stage 1. DC is a customized data capture object.

displayTriggerSettings(DC,N) displays the signal value comparisons and logical operator that define the overall trigger condition in a trigger stage specified by N. DC is a customized data capture object.

Input Arguments

collapse all

Customized data capture object, specified as an hdlverifier.FPGADataReader System object.

Trigger stage, specified as an integer from 1 to M, where M is set by the Max trigger stages parameter of the FPGA Data Capture Component Generator tool. Use N to display the trigger condition in Nth trigger stage. If you do not specify N, by default, the function displays the trigger condition in trigger stage 1.

Introduced in R2017a