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Hardware I/O Devices

Model the connection between the IO devices on your board and your FPGA logic

Use these blocks to create models that simulate the connection between your SoC design and these IO devices.

Blocks

HDMI RxConvert video stream to YCbCr 4:2:2 pixel stream
HDMI TxConvert YCbCr 4:2:2 pixel stream to video frame
AD9361 RxConnect hardware logic to AD9361-based Zynq receiver
AD9361 TxConnect hardware logic to AD9361-based Zynq transmitter
Zynq and FMCOMMS2/3/4 Receiver ConfigurationConnect hardware logic to FMCOMMS Zynq radio receiver hardware
Zynq and FMCOMMS2/3/4 Transmitter ConfigurationConnect hardware logic to FMCOMMS Zynq radio transmitter hardware
ADAU1761 CodecConnect hardware logic to ADAU1761 signals on hardware board
RF Data ConverterProvide RF data path interface to hardware logic (Since R2020a)
ADC To VectorConvert concatenated 16-bit ADC input samples to vector outputs (Since R2020b)
Vector To DACConvert vector inputs to concatenated 16-bit DAC output samples (Since R2020b)
RFDC Bus CreatorConvert control signals into RF Data Converter real-time interface-compatible bus (Since R2022a)
RFDC Bus SelectorConvert RF Data Converter real-time interface-compatible bus into control signals (Since R2022a)
OTAVA DTRX2Integrate OTAVA DTRX2 mmWave radio card with ZCU208 board (Since R2023a)
Aurora 64B66BProvide high-speed serial communication using Xilinx Aurora interface (Since R2023a)

Tools

HDL IP ImporterImport HDL IP core into SoC model (Since R2023a)

Topics

Wireless Applications

Video Applications