Eldin Ramic
Followers: 0 Following: 0
Statistics
2 Questions
0 Answers
RANK
230,729
of 295,673
REPUTATION
0
CONTRIBUTIONS
2 Questions
0 Answers
ANSWER ACCEPTANCE
50.0%
VOTES RECEIVED
0
RANK
of 20,262
REPUTATION
N/A
AVERAGE RATING
0.00
CONTRIBUTIONS
0 Files
DOWNLOADS
0
ALL TIME DOWNLOADS
0
RANK
of 154,257
CONTRIBUTIONS
0 Problems
0 Solutions
SCORE
0
NUMBER OF BADGES
0
CONTRIBUTIONS
0 Posts
CONTRIBUTIONS
0 Public Channels
AVERAGE RATING
CONTRIBUTIONS
0 Highlights
AVERAGE NO. OF LIKES
Feeds
Question
is it possible to prevent the compiler from using variables in generated VHDL code?
Hi, is it possible to prevent the compiler from using the datatype "variable" in generated VHDL code? As it is an essential rul...
1 year ago | 0 answers | 0
0
answersQuestion
How do i define an array as a HDL input?
Hi, I want to use an array as an input type in my HDL model, e.g [uint8; uint8], but the following error is generated: Expre...
1 year ago | 2 answers | 0