Get Started with DSP HDL Toolbox
DSP HDL Toolbox™ provides pre-verified, hardware-ready Simulink® blocks and MATLAB® algorithms for developing signal processing applications such as wireless, radar, audio, and sensor processing. The toolbox includes reference applications to demonstrate the development of complex subsystems.
You can model, explore, and simulate DSP algorithm hardware architectures, assessing trade-offs in resource usage, power, and GSPS throughput with support for serial and parallel processing. The interactive DSP HDL IP Designer app lets you customize input stimulus and configure ports and properties of DSP algorithms directly. You can generate readable, synthesizable code from the algorithms in VHDL® and Verilog® (with HDL Coder™) and SystemVerilog DPI verification components (with HDL Verifier™).
Tutorials
- Implement FFT Algorithm for FPGA
Implement two hardware-optimized FFT architectures in Simulink.
- High-Throughput Channelizer for FPGA
Implement a polyphase filter bank channelizer with throughput of gigasamples-per-second (GSPS).
- Generate HDL Code for IIR Filter
Design and generate HDL code for a DC blocking filter in MATLAB.
DSP Design for Hardware
- Digital Signal Processing Design for FPGAs and ASICs
Learn a workflow for hardware-optimized DSP designs using DSP HDL Toolbox blocks.