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SATA 3.0 Compliance Kit

Characterize and validate the performance of a SATA 3.0 channel design.

This kit is designed for analysis of a channel design between the SATA 3.0 host and a SATA 3.0 device. The channel consists of a host board and a device board connected by a SATA cable with two mated connectors consistent with the SATA 3.0 specification.

This kit enables you to insert a channel and/or cable design and characterize and validate its performance using the specification masks or other specification requirements to determine if the channel has a high confidence of success. If the channel does not meet the compliance masks or BER estimates, further investigation or redesign, along with simulation, will need to be performed to determine possible changes to meet compliance.

Open SATA 3.0 Kit

Open the SATA 3.0 kit in the Serial Link Designer app using the openSignalIntegrityKit function.



Kit Overview

  • Project Name: SATA_3

  • Interface Name: SATA_3p0

  • Target Operating Frequency: 6 Gb/s (UI = 166.7 ps)

The SATA 3.0 kit defines three schematic sets. The first focuses channel compliance, second is for transmitter compliance and the third is for receiver compliance. A full-duplex channel is provided for aggressor crosstalk between the TX and RX channels of the full duplex structure.

  • Channel_Compliance – Schematic sheets focused on channel end-to-end compliance. SerDes and widebus sheets.

  • Transmitter Compliance – Schematic sheets for compliance and calibration testing of the TX

  • Receiver Compliance – Schematic sheets for compliance and tolerance testing of the RX

For more information about the SATA 3.0 channel compliance schematics, transfer net properties, and compliance rules, refer to the document SATA_3p0.pdf that is attached to this example as a supporting file.


[1] Serial ATA Revision 3.1 (July 18, 2011). SerialATA_Revision_3_1_Gold.pdf.

[2] SATA-IO Interoperability and Technical Training (November 15, 2010). SATA-IO-Tech-Training-Master_v2_PostedNoDigital.pdf.

See Also