USB 3.1 Compliance Kit
Characterize and validate the performance of a USB 3.1 channel design.
This kit is designed for analysis of a channel design between the USB 3.1 host and device. One schematic set focuses on host compliance and one schematic set focuses on device compliance. Both single channel schematics and multi-channel schematics are provided for host and device compliance. Reference S-parameter models from the USB 3.1 website are included for compliance testing. Each schematic directs you where to place your channel design.
This kit enables you to insert a channel design and characterize and validate its performance using the specification masks to determine if the channel has a high confidence of success. If the channel does not meet the compliance masks or BER estimates, further investigation or redesign, along with simulation, will need to be performed to determine possible changes to meet compliance.
Open USB 3.1 Kit
Open the USB 3.1 kit in the Serial Link Designer app using the
Project Name: USB_3p1_Gen2
Interface Name: USB_3p1_Gen2
Operating Frequency: 10 Gb/s (UI = 100 ps)
The USB 3.1 kit defines three schematic sets.
Host_Compliance – Schematic sheets focused on channel end-to-end compliance. Serdes and widebus sheets.
Device Compliance – Schematic sheets for DUT compliance driving either device or host boards. Widebus sheets only.
All_Schematics – All project schematic sheets.
For more information about the USB 3.1 channel compliance schematics, transfer net properties, and compliance rules, refer to the document USB_3p1.pdf that is attached to this example as a supporting file.
 Universal Serial Bus 3.1 (July 26, 2013). USB_3_1_r1.0.pdf.
 USB 3.0 Electrical Compliance Methodology White Paper (Revision 0.5). USB_3_0_e-Compliance_methodology_0p5_whitepaper.pdf.