Turbo Encoder

Encode binary data using parallel concatenated encoding scheme

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Libraries:
Communications Toolbox / Error Detection and Correction / Convolutional

Description

The Turbo Encoder block encodes a binary input signal using a parallel concatenated coding scheme. This coding scheme employs two identical convolutional encoders and one internal interleaver. Each constituent encoder is independently terminated by tail bits. For more information about the constituent encoders, see Parallel Concatenated Convolutional Encoding Scheme.

This icon shows the block with all ports enabled.

Examples

Parallel Concatenated Convolutional Coding: Turbo Codes

Characterize the performance of turbo codes over a noisy channel.

• Open Model

Ports

Input

In — Input message

binary column vector

Input message, specified as a binary column vector of length L, where L is the length of the uncoded input message.

Data Types: double | int8 | fi(data,0,1)

IntrInd — Interleaver indices

column vector of integers

Interleaver indices, specified as a column vector of integers. The vector must be of length L, where L is the length of the binary input message. Each element of the vector must be an integer in the range [1, L] and must be unique. The interleaver indices define the mapping used to permute the input bits at the encoder.

Dependencies

To enable this port, set the Source of interleaver indices property to Input port.

Data Types: double

OutInd — Output indices

column vector of integers

Output indices for the bit ordering and puncturing used on the fully encoded data, specified as a column vector of integers. Element values in the vector must be relative to the fully encoded data for the coding scheme, including the tail bits for all streams.

Tunable: Yes

Dependencies

To enable this port, set the Source of output indices property to Input port.

Data Types: double

Output

Out — Parallel concatenated codeword

binary column vector

Parallel concatenated codeword, returned as a binary column vector of length M, where M is the number of bits in the parallel concatenated codeword. This output inherits its data type from the In input.

Data Types: double | int8 | fi(data,0,1)

Parameters

To edit block parameters interactively, use the Property Inspector. From the Simulink^® Toolstrip, on the Simulation tab, in the Prepare gallery, select Property Inspector.

Trellis structure — Trellis description of constituent convolutional code

poly2trellis(4,[13 15],13) (default) | structure

Specify the trellis as a MATLAB^® structure that contains the trellis description for a rate K ∕ N constituent convolutional code. K is the number of input bit streams, and N is the number of output bit streams.

Note

K must be 1 for the turbo coder. For more information, see Coding Rate.

You can either use the poly2trellis function to create the trellis structure or create it manually. For more about this structure, see the Trellis Description of a Convolutional Code topic and the istrellis function.

The trellis structure contains these fields.

numInputSymbols — Number of symbols input to encoder

2^K

Number of symbols input to the encoder, specified as an integer equal to 2^K, where K is the number of input bit streams.

numOutputSymbols — Number of symbols output from encoder

2^N

Number of symbols output from the encoder, specified as an integer equal to 2^N, where N is the number of output bit streams.

numStates — Number of states in encoder

power of 2

Number of states in the encoder, specified as a power of 2.

nextStates — Next states

matrix of integers

Next states for all combinations of current states and current inputs, specified as a matrix of integers. The matrix size must be numStates by 2^K.

outputs — Outputs

matrix of octal numbers

Outputs for all combinations of current states and current inputs, specified as a matrix of octal numbers. The matrix size must be numStates by 2^K.

Source of interleaver indices — Source of interleaver indices

Property (default) | Input port

Specify the source of the interleaver indices as Property or Input port.

• When you set this parameter to Property, the block uses the Interleaver indices parameter to specify the interleaver indices.

• When you set this parameter to Input port, the block uses the IntrInd input port to specify the interleaver indices.

Interleaver indices — Interleaver indices

(64:-1:1).' (default) | column vector of integers

Specify the interleaver indices as a column vector of integers. The vector must be of length L, where L is the length of the binary input message. Each element of the vector must be an integer in the range [1, L] and must be unique. The interleaver indices define the mapping used to permute the input bits at the encoder.

Dependencies

To enable this parameter, set the Source of interleaver indices parameter to Property.

Source of output indices — Source of output indices

Auto | Property | Input port

Specify the source of the output indices as Auto, Property, or Input port.

• When you set this parameter to Auto, the block computes output indices that puncture the second systematic stream and include all tail bits.

• When you set this parameter to Property, the block uses the output indices that you specify for the Output indices parameter.

• When you set this parameter to Input port, the block uses the OutInd input port to specify the output indices. The vector length and values for the output indices and coded output signal can change with each execution of the block.

Output indices — Output indices

getTurboIOIndices(64,2,3) (default) | column vector of integers

Specify the output indices for the bit ordering and puncturing used on the fully encoded data as a column vector of integers. The number of bits output from the encoder is equal to the length of this parameter. The maximum length must not exceed the fully encoded length of (L+mLen) × N × 2), where L is the input vector length, mLen is the memory length, and N is the number of constituent coder encoded streams.

Dependencies

To enable this parameter, set the Source of output indices parameter to Property.

Simulate using — Type of simulation to run

Interpreted execution (default) | Code generation

Type of simulation to run, specified as Interpreted execution or Code generation.

• Interpreted execution — Simulate the model by using the MATLAB interpreter. This option requires less startup time, but the speed of subsequent simulations is slower than with the Code generation option. In this mode, you can debug the source code of the block.

• Code generation — Simulate the model by using generated C code. The first time you run a simulation, Simulink generates C code for the block. The model reuses the C code for subsequent simulations unless the model changes. This option requires additional startup time, but the speed of the subsequent simulations is faster than with the Interpreted execution option.

For more information, see Interpreted Execution vs. Code Generation (Simulink).

Block Characteristics

Data Types	Boolean | double | fixed pointa | integer | single
Multidimensional Signals	no
Variable-Size Signals	yes
a ufix(1) only.

More About

Parallel Concatenated Convolutional Encoding Scheme

The turbo encoder uses a parallel concatenated convolutional encoding scheme to encode a binary input signal. The coding scheme uses two constituent encoders and one internal interleaver as shown in this figure. Each constituent encoder is terminated independently by tail bits.

The Source of output indices parameter specifies the source for the output indices used for symbol puncturing and repetition.

• When you set the Source of output indices parameter to Auto, the block computes the output indices. In this case, the constituent encoders have a rate 1 ∕ N code, and the number of bits output from the turbo encoder is L × (2 × N – 1) + (2 × numTails). L is the input vector length, and numTails is given by log2(TrellisStructure.numStates) × N. The tail bits due to the termination are appended at the end after the encoded input bits.

  The coding scheme uses two identical constituent encoders and one internal interleaver. Each constituent encoder is terminated independently by tail bits. The output of the turbo encoder consists of the systematic (X) and parity (Z) bit streams of the first encoder and only the parity (Z^’) bit streams of the second encoder. Tail bits are appended at the end for all streams.

• When you set the Source of output indices parameter to Input port or Property, you specify the output indices with the OutInd input port or the Output indices parameter, respectively. In this case, the object runs using the output indices you specify. The output indices are specified relative to the fully encoded output for all streams.

  The output of the turbo encoder consists of the systematic (X and X^’) and parity (Z and Z^’) bit streams of first and second constituent encoders. The number of bits output equals the vector length of the output indices you provide.

For more information, see Coding Rate and Tail bits.

Coding Rate

In general, the coding rate of a constituent convolutional code is represented as a rate K ∕ N code. K is the number of input bit streams. N is the number of output bit streams.

Note

K must be 1 to use the Turbo Encoder and Turbo Decoder blocks. Alternatively, the High Rate Convolutional Codes for Turbo Coding example performs turbo coding for K greater than 1 by using the comm.ConvolutionalEncoder and comm.APPDecoder System objects.

The encoder accepts an L-element column vector input signal and returns an M-element column vector output signal. The effective code rate of the turbo encoder is L ∕ M. L is the length of the binary input message, and M is the number of bits output in the parallel concatenated codeword.

• When you set the Source of output indices parameter to Auto, systematic bits from the second encoder (X^’, shown in the figure found in Parallel Concatenated Convolutional Encoding Scheme) are not output to the parallel concatenated codeword. For a given trellis, M and L are related by M = L × (2 × N – 1) + 2 × numTails, where numTails is the number of tail bits. For more information, see Tail bits.

• When you set the Source of output indices parameter is to Input port or Property, M equals the length of the output indices vector specified by the OutInd input port or the Output indices parameter, respectively.

Tail bits

The turbo encoder treats each input independently. For each input message, extra bits are used to set the encoder states to an all-zeros state. Each constituent encoder is terminated independently by tail bits. The turbo encoder output consists of the interlaced systematic and parity streams, with the tail bits multiplexed to the end of the encoded data streams.

The number of tail bits, numTails, output by each constituent encoder depends on values in the trellis structure used by each coder.

• numTails = log₂(trellis.numStates) × N

• N = log₂(trellis.numOutputSymbols). For a rate 1 ∕ 2 trellis, N = 2.

For more information about trellis structures, see the poly2trellis function. For more information about the constituent encoders, see Parallel Concatenated Convolutional Encoding Scheme.

Encoder Schematic for Rate 1/3 Turbo Code Example

This figure shows the encoder configuration for a trellis specified by the default value of the Trellis structure parameter, poly2trellis(4,[13 15],13).

For an input vector length of 64 bits, the output of the encoder block is 204 bits. The first 192 bits correspond to the three 64 bit streams (systematic (X) and parity (Z) bit streams from the first encoder and the parity (Z^’) bit stream of the second encoder), interlaced as per X, Z, and Z^’. The last 12 bits correspond to the tail bits from the two encoders when the switches are in the lower position corresponding to the dashed lines. The first group of six bits (three systematic bits and three parity bits) are the output tail bits from the first constituent encoder. The second group of six bits (three systematic bits and three parity bits) are the output tail bits from the second constituent encoder.

Due to the tail bits, the encoder output code rate is slightly less than 1/3.

References

[1] Berrou, C., A. Glavieux, and P. Thitimajshima. “Near Shannon Limit Error-Correcting Coding and Decoding: Turbo-Codes.” Proceedings of ICC 93 - IEEE^® International Conference on Communications, 2: 1064–70. Geneva, Switzerland: IEEE, 1993. https://doi.org/10.1109/icc.1993.397441.

[2] Benedetto, S., G. Montorsi, D. Divsalar, and F. Pollara. "A Soft-Input Soft-Output Maximum A Posterior (MAP) Module to Decode Parallel and Serial Concatenated Codes." Jet Propulsion Lab TDA Progress Report (November 1996): 42–127.

[3] Schlegel, Christian, and Lance Perez. Trellis and Turbo Coding. IEEE Press Series on Digital & Mobile Communication. Piscataway, NJ; Hoboken, NJ: IEEE Press; Wiley-Interscience, 2004.

[4] 3GPP TS 36.212. "Multiplexing and channel coding." 3rd Generation Partnership Project; Technical Specification Group Radio Access Network; Evolved Universal Terrestrial Radio Access (E-UTRA).

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Version History

Introduced in R2011b