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HDL IP Core Generation

Deploy generated IP core on a target hardware platform

Generate a reusable HDL IP core to design a system that you can deploy on hardware or a combination of hardware and software. Deploy your MATLAB® or Simulink® design:

  • As hardware and software on system-on-chip (SoC) platforms, such as Xilinx® Zynq®, Intel® SoC or Microchip SoC.

  • On standalone FPGA boards, such as an Intel FPGA or a Xilinx FPGA board.

  • On platforms that have a separate FPGA and processor, such as the Simulink Real-Time™ target machine with FPGA I/O boards.

If you are using an SoC platform or a platform that has a separate FPGA and processor, you can partition your design to generate hardware that targets the FPGA fabric and software that runs on the embedded processor of the target platform.

For more details on the workflow, see Targeting FPGA & SoC Hardware Overview. For more details on specific hardware platforms, see HDL Coder Supported Hardware.

HDL IP Core Generation Worfklow

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