Detect and Address Logical Errors
Identify logical errors in your model by using dead logic detection
Identify logical errors where coverage conditions cannot satisfy all expected values by using dead logic detection.
- Dead Logic Detection
Describes the two analysis modes for dead logic detection in Simulink® Design Verifier™.
- Common Causes for Dead Logic
Describes several scenarios that results in dead logic.
- Detect Dead Logic Caused by an Incorrect Value
Example showing how to find an incorrect input specification using a dead logic result.
- Check for Specified Minimum and Maximum Value Violations
Describes how to analyze the model to verify that specified design minimum and maximum values are honored.
- Analyze Models for Design Errors
Run a Design Error Detection Analysis and interpret the results.