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Programmable Logic

Design and develop the custom hardware for the programmable logic (PL) or FPGA component of an SoC application

Analyze a Simulink® model by using the socModelAnalyzer function to estimate the resources used in a model, to compare different architectures, and to understand design tradeoffs. Use the socFunctionAnalyzer function to analyze resources in a MATLAB® function.

The socModelAnalyzer and socFunctionAnalyzer functions create a report detailing the number of operations in a Simulink model or a MATLAB function, respectively.

Use the information in the report to:

  • Decide how to partition your algorithm into software and hardware.

  • Optimize a hardware algorithm.

  • Optimize a software algorithm.

  • Compare different implementations of an algorithm to make informed decisions about design choices.


socModelAnalyzerEstimate number of operations in Simulink model (Since R2020a)
socFunctionAnalyzerEstimate number of operations in MATLAB function (Since R2020a)
socAlgorithmAnalyzerReportOpen algorithm analysis report (Since R2020a)
socExportReferenceDesignExport custom reference design for HDL Workflow Advisor (Since R2020a)


Logic AnalyzerVisualize, measure, and analyze transitions and states over time



Build Error When FPGA or Processor Model Not Detected

Unsupported mode in when generating SoC design using SoC Builder.