soc.sdk.FPGACore Class

Namespace: soc.sdk

FPGA core definition in Hardware object

Description

Use the soc.sdk.FPGACore class to define a FPGA core in the soc.sdk.Hardware object.

Creation

Description

fpgaCoreObj = soc.sdk.FPGACore(Name)

creates a new soc.sdk.FPGACore object, with the Name property set to name.

Properties

Name — Name of the FPGA core

character vector

The name of the FPGA core.

Note

The name must start with a letter and may contain letters, numbers, underscores, minus signs, slashes and spaces.

Example: 'MyFPGACore'

Attributes:

GetAccess	public
SetAccess	public

Data Types: char

PartNumber — Part number of FPGA core

'' (default) | character vector

The part number of the FPGA core, specified as a string of displayable characters.

Attributes:

GetAccess	public
SetAccess	public

Data Types: char

Family — Family of FPGA core

'Zynq-7000' (default) | 'MPSoC' | 'Artix-7' | 'Kintex-7'

The family of the FPGA core, specified as a string of displayable characters.

Attributes:

GetAccess	public
SetAccess	public

Data Types: char

Vendor — Vendor of FPGA core

'' | 'Xilinx'

The vendor of the FPGA core.

Example: 'Xilinx'

Attributes:

GetAccess	public
SetAccess	public

Data Types: char

JTAGChainPosition — JTAG chain position

1 (default) | positive integer

The JTAG chain position for the FPGA core, specified as a positive integer.

Example: 5

Attributes:

GetAccess	public
SetAccess	public

Data Types: double

MemorySystems — Memory system objects

{} (default) | cell array of MemorySystem objects

The memory system for the FPGA core.

Attributes:

GetAccess	public
SetAccess	public

Data Types: cell

ProcessingSystems — Processing system objects

{} (default) | cell array of ProcessingSystem objects

The processing system objects for the FPGA core.

Attributes:

GetAccess	public
SetAccess	public

Data Types: cell

Methods

Public

addNewMemorySystem	Add new memory system to the FPGACore object
addNewProcessingSystem	Add new processing system to the FPGACore object

Version History

Introduced in R2019b