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visionzynq.changeFPGAImage

Load image from on-board SD card into FPGA

Add-On Required: This feature requires the Vision HDL Toolbox Support Package for Xilinx Zynq-Based Hardware add-on.

Description

example

changeFPGAImage(vz,'default') programs the FPGA on the visionzynq target with the default image that is included with the support package and restarts the board. The function returns when the board reboot is complete and the board is ready to run the loaded design. The default FPGA image has pass-through logic in place of the FPGA user logic and uses the Vision HDL Toolbox™ custom pixel-streaming interface.

example

changeFPGAImage(vz,filename) programs the FPGA with a custom image from the visionzynq-customtgt subfolder on the SD card. This function then restarts the board. This syntax is valid only when the FPGA image contains FPGA user logic that has a Vision HDL Toolbox custom pixel-streaming interface.

Use this function to change the image currently running on the target FPGA without having to run the HDL Workflow Advisor or the support package guided setup process. You can use this function in any of these situations.

  • You have multiple generated image files on the SD card.

  • You want to switch between the default image and the generated image.

  • You are working through the Developing Vision Algorithms for Zynq-Based Hardware example and want to see the results of targeting without running the HDL Workflow Advisor. The FPGA image for this example is installed with the support package and included on the SD card.

changeFPGAImage(vz,filename,dtree) loads the specified FPGA image and also configures the device tree on the board. The device tree settings must match the interface that the FPGA user logic uses: a Vision HDL Toolbox custom pixel-streaming interface or an AXI4-Stream Video interface.

example

changeFPGAImage(vz,'list') lists the available FPGA image files that are located in the visionzynq-customtgt subfolder on the SD card.

Examples

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For the installed board, in this case ZedBoard™ with FMC-HDMI-CAM, change the FPGA image to the default image that is shipped with the support package.

If you do not have this object defined in the workspace, create an object that contains a connection to the board.

vz = visionzynq()
vz = 


visionzynq

   Device Information:
       DeviceName: 'Zedboard FMC-HDMI-CAM'
    DeviceAddress: '192.168.4.2'
         Username: 'root'
         Password: 'root'
             Port: 22

Load the default FPGA image.

changeFPGAImage(vz,'default');
## Copying DTB image located at /mnt/visionzynq-refdes/visionzynq-zedboard-hdmicam.dtb to /mnt/devicetree.dtb
## Copying FPGA image located at /mnt/visionzynq-refdes/visionzynq-zedboard-hdmicam.bit to /mnt/system.bit
## Rebooting board ...........
## Reboot complete

For the installed board, in this case ZedBoard with FMC-HDMI-CAM, list the available image files in the visionzynq-customtgt folder on the SD card.

If you do not have this object defined in the workspace, create an object that contains a connection to the board.

vz = visionzynq()
vz = 


visionzynq

   Device Information:
       DeviceName: 'Zedboard FMC-HDMI-CAM'
    DeviceAddress: '192.168.4.2'
         Username: 'root'
         Password: 'root'
             Port: 22

List the image files available to load to the FPGA.

changeFPGAImage(vz,'list')
default
visionzynq-zedboard-hdmicam-corner_overlay.bit
visionzynq-zedboard-hdmicam-edge_overlay.bit

For the installed board, in this case ZedBoard with FMC-HDMI-CAM, load a custom FPGA image from the visionzynq-customtgt folder on the SD card.

If you do not have this object defined in the workspace, create an object that contains a connection to the board.

vz = visionzynq()
vz = 


visionzynq

   Device Information:
       DeviceName: 'Zedboard FMC-HDMI-CAM'
    DeviceAddress: '192.168.4.2'
         Username: 'root'
         Password: 'root'
             Port: 22

Load one of the files from the visionzynq-customtgt folder. This command assumes you have previously downloaded this custom image to the board, and that the image is configured to use the AXI4-Stream Video interface.

changeFPGAImage(vz,'mydesign_axi.bit', ...
'visionzynq-zedboard-hdmicam-axi-video.dtb')
## Copying DTB image located at /mnt/visionzynq-refdes/visionzynq-zedboard-hdmicam-axi-video.dtb to /mnt/devicetree.dtb
## Copying FPGA image located at /mnt/visionzynq-refdes/mydesign_axi.bit to /mnt/system.bit
## Rebooting board ...........
## Reboot complete

Input Arguments

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Connection properties, specified as a visionzynq object that connects from the host computer to the Zynq® board.

FPGA image filename, specified as a character vector. This argument must match a filename in the visionzynq-customtgt subfolder on the SD card.

Example: 'work\hdl_prj\vivado_ip_prj\mydesign_axi.bit'

Device tree configuration filename, specified as a character vector. These files ship with the software, and the filenames indicate the board and the interface type. For example, use 'visionzynq-zcu102-hdmicam.dtb' with the Xilinx® Zynq UltraScale+™ MPSoC ZCU102 Evaluation Kit and with FPGA user logic that has the default Vision HDL Toolbox custom pixel-streaming interface. Use 'visionzynq-zcu102-hdmicam-axi-video.dtb' with the Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit and with FPGA user logic that has an AXI4-Stream Video interface.

If you omit this argument, the function loads a device tree for the Vision HDL Toolbox custom pixel-streaming interface. If your FPGA image uses the AXI4-Stream Video interface and you do not load the correct device tree, when you simulate your model with logic running on the board, you receive this error message.

command "/mnt/visionzynq-tools/visionzynq-target-dev.elf --write --device=/dev/mwipcore_vht2vs --address=0x00 0x01".
    Error evaluating 'StartFcn' callback of SubSystem block (mask) 
'gm_vzImageRotation_PixelStream_tgthw_interface/Video Capture/VisionZynq Internal/FrameCapture_Init/Frame Format Check'. 
Callback string is 'visionzynq.internal.vzmask(gcb, 'FrameFormatCheckCb','StartFcn');' 
Caused by: Error executing command "/mnt/visionzynq-tools/visionzynq-target-dev.elf --write --device=/dev/mwipcore_vht2vs --address=0x00 0x01"

Version History

Introduced in R2016a

See Also

Functions