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Run and Verify Hardware Implementation

Now that you have generated a bitstream, you can load it onto the FPGA of your radio device, connect to your radio from the host, and interact with your deployed algorithm. To generate the MATLAB® code to get started, generate the host interface scripts and modify them to exercise your DUT.

Generate Host Interface Scripts

To generate host interface scripts, in the HDL Code tab, click Host Interface Script. This step creates two scripts in the MATLAB current folder:

  • gs_<modelName>_interface.m — This script creates an fpga hardware object for interfacing with your FPGA from MATLAB. You can use the MATLAB code provided to connect to your hardware, program the FPGA, and exchange data with your algorithm as it runs on your radio.

  • gs_<modelName>_setup.m — This script configures the fpga object with the hardware interfaces and ports from your DUT algorithm. The script includes the port name, direction, data type, and interface mapping information for each DUT port.

Interface Script File

  1. Provides a short overview of how to use the generated interface script.

    %--------------------------------------------------------------------------
    % Host Interface Script
    % 
    % Generated with MATLAB 24.2 (R2024b) at 10:13:36 on 10/07/2024. This
    % script was created for the IP Core generated from design 'ModelName'.
    % 
    % Use this script to access DUT ports in the design that were mapped to
    % compatible IP core interfaces. You can write to input ports in the design
    % and read from output ports directly from MATLAB. To write to input ports,
    % use the "writePort" command and specify the port name and input data. The
    % input data will be cast to the DUT port's data type before writing. To
    % read from output ports, use the "readPort" command and specify the port
    % name. The output data will be returned with the same data type as the DUT
    % port. Use the "release" command to release MATLAB's control of the
    % hardware resources.
    %--------------------------------------------------------------------------
    
  2. Creates a usrp System object™, which represents a connection to your radio. The script contains the programFPGA function that programs the FPGA with the generated bitstream and corresponding device tree. The script also contains the describeFPGA function that configures the DUT interfaces according to the hand-off information file.

    %% Program FPGA
    % Uncomment the line below to program FPGA hardware on the USRP with the
    % designated bitstream. Specify a radio configuration you saved using the
    % Radio Setup wizard.
    hDevice = usrp("MyRadio");
    % programFPGA(hDevice, "build_N320_HG/build-N320_HG/n3xx.bit", ...
    %  "build_N320_HG/build/usrp_n320_fpga_HG.dts");
    describeFPGA(hDevice, "ModelName_wthandoffinfo.mat");
    
  3. Configures the radio front end parameters by updating usrp System object Properties. The property values are derived for the values you set in the Reference Design Settings.

    %% Configure device object
    % Uncomment the below line to specify a different sample rate than the
    % value set during bitstream generation. Specify the radio antennas to use.
    % hDevice.SampleRate = 250e6;
    hDevice.DUTInputAntennas = "RF0:RX2";
    
    % Set the radio parameters to meaningful values for the design. These
    % values may be tuned after setting up the device object.
    hDevice.ReceiveCenterFrequency = 2400000000;
    hDevice.ReceiveRadioGain = 10;
  4. Creates an fpga object that represents a connection to the DUT on your radio.

    %% Create fpga object
    hFPGA = fpga(hDevice);
  5. Configures the fpga object with the hardware interfaces and ports from your DUT algorithm using the setup function script. For details, see Setup Function File.

    %% Setup fpga and usrp object
    % This function configures the "fpga" object with the same interfaces as
    % the generated IP core. Edit gs_ModelName_setup.m to customise the frame
    % size and timeout for each DUT streaming connection to MATLAB.
    gs_ModelName_setup(hFPGA);
    
  6. Connects to and configures the radio using the setup function with the usrp System object.

    % Setup the device to connect to the radio and apply properties.
    setup(hDevice);
  7. Contains example commands that read or write data to DUT ports using the readPort and writePort functions, which you can use to exercise the algorithm running on the hardware. Update these lines with meaningful values before running the script.

    %% Write/read DUT ports
    % Uncomment the following lines to write/read DUT ports in the generated IP
    % Core. Use the writePort or readPort functions at any time between setting
    % up the device and releasing hardware resources. Update the example data
    % in the write commands with meaningful data to write to the DUT.
    % writePort(hFPGA, "Write_Register", zeros([1, 1])); [data_Data_Out, ...
    %  numSamps_Data_Out, overflow_Data_Out] = readPort(hFPGA, "Data_Out");
    % data_Read_Register = readPort(hFPGA, "Read_Register");
  8. Calls the usrp System object as if it were a function to start streaming samples from the radio front end.

    %% Stream samples from the radio front end
    % Specify a number of samples to send to the DUT input streaming
    % connections connected to the radio. Alternatively, stream continuously by
    % specifying Inf.
    hDevice(1000);
    
  9. Provides an empty section for you to add MATLAB code to interface with your algorithm and your radio.

    %% Implement user design
    % Samples are now available at streaming connections connected to the
    % radio. Implement your algorithm by writing and reading ports on the DUT.
    % Update the example data in the write commands with meaningful data to
    % write to the DUT. 
    % writePort(hFPGA, "Write_Register", zeros([1, 1]));
    % [data_Data_Out, numSamps_Data_Out, overflow_Data_Out] = readPort(...
    %  hFPGA, "Data_Out");
    % data_Read_Register = readPort(hFPGA, "Read_Register");
  10. Releases hardware resources.

    %% Release hardware resources
    release(hFPGA);
    release(hDevice);

Setup Function File

The setup function file configures your fpga object with the same interfaces as your generated IP core.

If your DUT has register ports, the setup function adds an RFNoC register interface with the addRFNoCRegisterInterface function, creates a hdlcoder.DUTPort (HDL Coder) object array for each register port, then uses the mapPort function to map the DUT ports to the RFNoC register interface.

Note

Update the DataType property to the data type you set the port in your Simulink® model. If the data type is a complex data type, set the IsComplex property to true.

%% Add RegisterInterface
addRFNoCRegisterInterface(hFPGA, ...
    "InterfaceID", "DUTName", ...
    "RFNoCBlock", "0/DUTName#0");

DUTPort_Write_Register = hdlcoder.DUTPort("Write_Register", ...
	"Direction", "IN", ...
	"DataType", "int16", ...
	"IsComplex", false, ...
	"Dimension", [1 1], ...
	"IOInterface", "DUTName", ...
	"IOInterfaceMapping", 128);

DUTPort_Read_Register = hdlcoder.DUTPort("Read_Register", ...
	"Direction", "OUT", ...
	"DataType", "int16", ...
	"IsComplex", false, ...
	"Dimension", [1 1], ...
	"IOInterface", "DUTName", ...
	"IOInterfaceMapping", 1);

mapPort(hFPGA, [DUTPort_Write_Register,DUTPort_Read_Register]);

For each RFNoC streaming interface in your model, the setup function adds an RFNoC streaming interface to the DUT with the addRFNoCStreamInterface function, creates a hdlcoder.DUTPort (HDL Coder) object array for the DUT port, then uses the mapPort function to map the DUT port to the RFNoC streaming interface.

Note

For streaming interfaces to and from the host, update the DataType property to the data type you set the port in your Simulink model. If the data type is a complex data type, set the IsComplex property to true.

%% Add RFNoC Stream Interface
RX_STREAM0_FrameSize = 1e5;
addRFNoCStreamInterface(hFPGA, ...
    "InterfaceID", "RX_STREAM#0", ...
    "Streamer", "0/RX_STREAM#0", ...
    "Direction", "OUT", ...
    "FrameSize", RX_STREAM0_FrameSize, ...
    "DDRAllocation", RX_STREAM0_FrameSize, ...
    "Timeout", []); % [] calculates a timeout of 1+hDevice.SampleRate/FrameSize

DUTPort_Data_Out = hdlcoder.DUTPort("Data_Out", ...
	"Direction", "OUT", ...
	"DataType", "uint32", ...
	"IsComplex", false, ...
	"Dimension", [1 1], ...
	"IOInterface", "RX_STREAM#0");

mapPort(hFPGA, DUTPort_Data_Out);

The setup script is a reusable file. When you make changes to your IP core, you must update or regenerate the setup script.

Use Host Interface Scripts with Hardware

For rapid prototyping, customize the host interface script in line with modifications you make to your design. After you generate the host interface scripts, follow these steps:

  1. Use the Radio Setup wizard to connect and set up your radio.

  2. Modify the read and write commands in the interface script file to match your data requirements. Use the modified script to interface with the radio and your deployed algorithm.

  3. Run the modified host interface script.

  4. Release hardware resources.

Once you have iterated and tested the host interface script, you can:

  • Integrate the script into a testing or verification workflow.

  • Create a live script and interactively prototype your design.

Manage Host Interface Scripts

When you make minor changes such as modifying existing parameters or making minor error fixes, you can update your existing host interface script.

When you make major changes such as modifying the interface mapping table or changing the target device, regenerate the host interface script files. When you regenerate the host interface script files, a warning is displayed about overwriting existing files. To prevent existing files from being overwritten, rename the files.

Note

Use the BlockID reference design parameter to identify iterations of your design. You set this in the Configure HDL Code Generation Settings step.

See Also

Objects

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