What is the sample time of discrete blocks that inherit from a 0-sample-time continuous signal block?

Picture a simple Simulink model with a sine wave function of sample time set to 0.

This is connected to a Unit Delay block with sample time -1 (inherited).

The output of the delay block is discrete. The Timing Legend shows it in red (discrete), with a period of 0.3.

Is this period the sample time of the output of the discrete block?

How is this period of 0.3 defined/calculated?

Answer 1

[Tridib]

Hi @Mitsu,

The period shown in the Timing Legend for the “Unit Delay” block is the sample time at which the output of the block updates.

The “Sine Wave” block is continuous (sample time = 0), so it can provide output at any time. The ‘Unit Delay” block is discrete. Its sample time is set to -1, which means, it will inherit its sample time from the driving (upstream) context.

In Simulink, discrete blocks like the “Unit Delay” require a specific sample time. If you connect a “Unit Delay” block directly to a continuous source and leave its sample time at -1, Simulink assigns it a sample time based on the solver settings. By default, if no other discrete rates are set, Simulink uses the default fixed-step size of 0.2 seconds as the sample time for the “Unit Delay.”

You can adjust the solver’s fixed step size, which sets the period for discrete blocks. The period of 0.3 that you see could be because the default fixed step size was changed to 0.3 in the solver settings.

Hope this helps!