Code Optimization for QHL
R2026bGenerate optimized code for digital signal processing from blocks, System objects, math functions, and math operators using code replacement.
Qualcomm Hexagon processors require specific conditions to allow code replacement with the Qualcomm Hexagon library (QHL for scalar processors). You use this code replacement when generating C/C++ code from a model.
Blocks
| QHL IIR Interpolator | Interpolate signals using cascaded biquad IIR filter optimized for QHL (Since R2026b) | |
| Sqrt | Compute square root of fixed-point signal with QHL-compatible scaling (Since R2026b) |
Objects
hexagon.IIRInterpolator | Interpolate signals using cascaded biquad IIR filter optimized for QHL (Since R2026b) |
Topics
- Conditions for Code Replacement of DSP Blocks with QHL
Specify conditions for DSP blocks to allow code replacement with the Qualcomm Hexagon library.
- Conditions for Code Replacement of DSP System Objects with QHL
Specify conditions for DSP System objects to allow code replacement with the Qualcomm Hexagon library.
- Conditions for Code Replacement of Math Operators with QHL
Specify conditions for math operators to allow code replacement with the Qualcomm Hexagon library.
- Conditions for Code Replacement of MATLAB Functions with QHL
Specify conditions for MATLAB functions to allow code replacement with the Qualcomm Hexagon library (QHL).
- Conditions for Code Replacement of Simulink Blocks with QHL
Specify conditions for Simulink blocks to allow code replacement with the Qualcomm Hexagon library (QHL).
- Generate SIMD Code using Hexagon and HVX Instruction Set for Qualcomm Hexagon Processors
Learn how to generate SIMD code from MATLAB® functions using Hexagon and HVX instruction set for Qualcomm Hexagon processors. (Since R2026a)


