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Hardware-Software Deployment

Deploy and run hardware-software model on target hardware

Generate C code (requires Embedded Coder®) from your software interface model and use external mode or processor-in-the-loop (PIL) mode to deploy and run your hardware-software model on target hardware. The input is a deployable model for your SoC device, which consists of:

  • A generated bitstream from your original model containing your HDL IP core.

  • A software interface model containing configured device drivers to allow communication between your processor and FPGA and C code generation for embedded processor.

The output is generated code for a hardware-software device running on your target hardware.

For more details on the workflow, see Targeting FPGA & SoC Hardware Overview.

Hardware-Software Deployment Workflow