Configure Model Representation and Continue Analysis

When you use Simulink^® Design Verifier™ to analyze a model for the first time, Simulink Design Verifier performs a compatibility check and creates a model representation. The model representation contains information about model behavior to use for analysis. By default, the software saves the model representation at the Simulation cache folder location.

The model representation defines how Simulink Design Verifier interprets your model during analysis. You can reuse previously generated representations to improve efficiency for repeated analyses. For more information, see Reuse Model Representation for Analysis.

Set Model Representation Build Options

You can configure Simulink Design Verifier to rebuild or reuse the model representation by setting the Rebuild model representation parameter. Alternatively, use an options object that you create with sldvoptions, and set the object property RebuildModelRepresentation.

opts.RebuildModelRepresentation = "IfChangeIsDetected";

By default, if there is no change in the model that can impact its simulation behavior, Rebuild model representation is set to If change is detected.

This table summarizes the behavior of Simulink Design Verifier analysis based on the value you select for Rebuild model representation.

Value	Behavior
`If change is detected` (default)	Trigger a rebuild when changes are detected in the model. Validate the model representation against any model changes and Simulink Design Verifier analysis options. If the cached model is successfully validated, Simulink Design Verifier reuses it for analysis. If change is detected in the model, Simulink Design Verifier rebuilds the model representation.
`Always`	The model representation is rebuilt during every model analysis, regardless of whether there are any changes to the model.

Results Summary window. The first message in the window is [insert message text here]. The callout text If change is detected points to the message.

When you perform analysis, the Results Summary window displays that Simulink Design Verifier builds the model representation.

Reuse Model Representation for Analysis

If you modify a model and rerun the analysis, Simulink Design Verifier determines whether to rebuild the model representation or to use the existing Simulink cache depending on the value of the Rebuild model representation parameter.

When the Rebuild model representation option is set to If change is detected, Simulink Design Verifier checks for these changes in a model:

Simulink Design Verifier Options

The software validates the model representation against any changes in the Simulink Design Verifier options. This table lists the options that do not affect the model representation. If you change any of these options the software reuses the model representation.

Design Verifier Options	Maximum analysis time Output folder Make output file names unique by adding a suffix Run additional analysis to reduce instances of rational approximation Ignore objectives based on filter Filter file(s)
Test Generation options	Test conditions Test objectives Maximum test case steps Test suite optimization Extend using existing coverage data Extend using existing test data Separate objectives satisfied with the existing tests/coverage data in the report
Property Proving options	Assertion blocks Proof assumptions Strategy Maximum violation steps
Results generation options	Data file name Include expected output values Randomize data that do not affect the outcome Generate separate harness model after analysis Harness model file name Reference input model in generated harness Test File Name Test Harness Name
Report generation options	Generate report of the results Generate additional report in PDF format Report file name Include screen shots of properties Display report

Structural Checksum of a Model

Simulink Design Verifier uses both structural checksum and code checksum. A structural checksum is a computation that detects changes in the model that can affect simulation results. For more information about the kinds of changes that affect the model, see Rebuild. When you Generate Test Cases for Embedded Coder Generated Code, Simulink Design Verifier also considers checksum of the generated code.

Additional Dependencies

In addition to structural checksum, Simulink Design Verifier checks for changes in model dependencies that can impact the analysis results, such as:

Simulation run-time parameters that are defined in the data dictionary or the MATLAB^® base, mask, or model workspaces
External C or C++ source code files that the model uses during simulation
Minimum and maximum constraints that are specified for block parameters
Block parameters that are specified for blocks in the Simulink Design Verifier Block Library.

If there are any changes to any of these dependencies, then Simulink Design Verifier rebuilds the model representation if Rebuld model representation is set to If change is detected.

Continue Analysis from a Saved State

After reusing the existing model representation for analysis, you can continue to enhance the efficiency by resuming an incomplete analysis from its saved state. The Simulink cache file stores both the model representation and analysis results. When you share or reuse this file, you speed up analysis and avoid rebuilding the model. When an analysis stops before completion due to time limits, resource constraints, or manual interruption, Simulink Design Verifier automatically saves the analysis state and the internal abstraction of the model, provided the model and analysis options remain unchanged. This capability eliminates the need to rebuild the model or restart the process, enabling continuity and reducing computational overhead. For more information on how to continue an incomplete analysis, see Resume an Incomplete Analysis.

Options That Must Remain Unchanged to Reuse Analysis Results

The software validates the analysis results against any changes in the Simulink Design Verifier options. This table lists the options that must remain unchanged to reuse analysis results:

Design Error Detection	Defect Checker
Test Generation options	Maximum test case steps Test suite optimization Extend using existing test data
Property Proving options	Strategy Maximum violation steps
Results generation options	Randomize data that do not affect the outcome

Limitations

Reusing the model representation is not supported when:
- You start a Simulink Design Verifier analysis from other products such as Simulink Test™, Simulink Coverage™, Simulink Check, and Requirements toolbox.
- The model contains MATLAB System blocks.
In these cases, Simulink Design Verifier always rebuilds the model representation when you start a new analysis.
Simulink Design Verifier does not detect changes in the custom block replacement rules that you apply, even if Rebuild model representation is set to If change is detected. In such cases, the Simulink cache is reused for analysis and a warning message is displayed in the Diagnostic Viewer that suggests you to set Rebuild model representation to Always, to rebuild the model representation.