# SM ST5C

Discrete-time or continuous-time synchronous machine ST5C static excitation system with automatic voltage regulator

*Since R2023a*

**Libraries:**

Simscape /
Electrical /
Control /
SM Control

## Description

The SM ST5C block implements a synchronous-machine-type ST5C static excitation system model in conformance with IEEE Std 421.5-2016 [1].

Use this block to model the control and regulation of the field voltage of a synchronous machine.

Switch between continuous and discrete implementations of the block by using the
**Sample time (-1 for inherited)** parameter. To configure the
integrator for continuous time, set the **Sample time (-1 for
inherited)** parameter to `0`

. To configure the integrator
for discrete time, set the **Sample time (-1 for inherited)** parameter
to a positive scalar. To inherit the sample time from an upstream block, set the
**Sample time (-1 for inherited)** parameter to
`-1`

.

The SM ST5C block comprises three major components:

The Current Compensator component modifies the measured terminal voltage as a function of the terminal current.

The Voltage Measurement Transducer component simulates the dynamics of a terminal voltage transducer using a low-pass filter.

The Excitation Control Elements component compares the voltage transducer output with a terminal voltage reference to produce a voltage error value. The component then passes this value through a voltage regulator to produce the field voltage.

This diagram shows the structure of the ST5C excitation system model:

In the diagram:

*V*and_{T}*I*are the measured terminal voltage and current of the synchronous machine, respectively._{T}*V*is the current-compensated terminal voltage._{C1}*V*is the filtered, current-compensated terminal voltage._{C}*V*is the reference terminal voltage._{REF}*V*is the power system stabilizer voltage._{S}*E*and_{FD}*I*are the field voltage and current, respectively._{FD}

### Current Compensator and Voltage Measurement Transducer

The block models the current compensator by using this equation:

$${V}_{C1}={V}_{T}+{I}_{T}\sqrt{{R}_{C}^{2}+{X}_{C}^{2}},$$

where:

*R*is the load compensation resistance._{C}*X*is the load compensation reactance._{C}

The block implements the voltage measurement transducer as a Low-Pass
Filter block with the time constant
*T _{R}*. Refer to the documentation for the
Low-Pass Filter block for information about the exact discrete and continuous
implementations.

### Excitation Control Elements

This diagram shows the structure of the excitation control elements:

In the diagram:

The Summation Point Logic subsystem models the summation point input location for the overexcitation limiter (OEL), underexcitation limiter (UEL), stator current limiter (SCL), and power switch selector (V_S) voltages. For more information about using limiters with this block, see Field Current Limiters.

The Take-over Logic subsystem models the take-over point input location for the OEL, UEL, SCL and PSS voltages. For more information about using limiters with this block, see Field Current Limiters.

A parallel configuration of Lead-Lag (Discrete or Continuous) blocks offer independent control settings when a limiter is active. The model offers a common gain factor

*K*and two Lead-Lag (Discrete or Continuous) blocks for the AVR and for the underexcitation and overexcitation limiters. The SW_UEL and SW_OEL Switch blocks activate the appropriate control path when the_{R}*V*and/or_{UEL}*V*signals are connected to their respective alternate positions. The SW_UEL and SW_OEL Switch blocks are on position B when you set the_{OEL}**Alternate UEL input locations (V_UEL)**and**Alternate OEL input locations (V_OEL)**parameters to`Take-over at voltage error`

.The two Lead-Lag blocks in each control path model additional dynamics associated with the voltage regulator and with the underexcitation and overexcitation limiters. The first Lead-Lag block in each respective path represents a transient gain reduction, where

*T*(or_{C}*T*and_{C2}*T*) is the lead time constant and_{UC2}*T*(or_{B}*T*and_{B2}*T*) is the lag time constant. The second Lead-Lag block allows the possibility of representing a transient gain increase, where_{UB2}*T*is the lead time constant and_{C1}*T*is the lag time constant. See the documentation for the Lead-Lag block for information about the discrete and continuous implementations._{B1}

### Field Current Limiters

You can use different types of field current limiter to modify the output of the voltage regulator under unsafe operating conditions:

Use an overexcitation limiter to prevent overheating of the field winding due to excessive field current demand.

Use an underexcitation limiter to boost field excitation when it is too low, which risks desynchronization.

Use a stator current limiter to prevent overheating of the stator windings due to excessive current.

Attach the output of any of these limiters at one of these points:

Summation point — Use the limiter as part of the automatic voltage regulator (AVR) feedback loop.

Take-over point — Override the usual behavior of the AVR.

If you are using the stator current limiter at the summation point,
use the input *V _{SCLsum}*. If you are using
the stator current limiter at the take-over point, use the overexcitation input

*V*, and the underexcitation input

_{SCLoel}*V*.

_{SCLuel}## Ports

### Input

### Output

## Parameters

## References

[1] IEEE Std 421.5-2016 (Revision of
IEEE Std 421.5-2005). "*IEEE Recommended Practice for Excitation System Models
for Power System Stability Studies.*" Piscataway, NJ: IEEE,
2016.

## Extended Capabilities

## Version History

**Introduced in R2023a**