I have a workflow for generating PID controllers parameters that I would like to script so that I no longer need to open and enter parameters in to sisotool GUI. However I cannot find a completly equivilant workflow on the CML side that replicates my results. I outline my workflow below, thanks in advance for the help!
1) First I run a script to define my transfer functions, then launch the sisotool.
2) Next I select Edit Architecture from the sisotool GUI, select my architecture, and insert the transfer function defined in my setup script into the approriate locations in the architecture. I only define the G and H blocks, the rest I do not provide input for.
3) With my architecture defined I select "Tuning Methods"->"PID Tuning". In the Specifications I select the "PID" controller type and "Design with first order derivative filter". For design mode I switch to "Frequency" and specify the bandwidth that I desier ( this is the parameter I particularly interested in )
.
4) Finaly I extract the optimized coefficent from the PID controller.
Things I have tried....
pidtuner function:
This function seemes promising however I do not see how I can create an architecture that is equivilent to the one I selected in the GUI with the feedback block H.
systune tool and setting TunningGoals:
I setup an equivilant architecture that I pluged into the systune tool. However I could not seupt appropiate TuningGoals to recreate the workflow that I have by hand.