I changed the Target to ADI RF SOM. In HDL Workflow Advisor at 1.3 - Set Target Interface you can select some DIP Switches or Push Buttons as GPIOs for Inputs and LEDs for Outputs. You can also use External Port and provide a list of FPGA Pins at Interface Mapping: {'LSB',...,'MSB'}.
When you type something strange you get a message:
I just changed the overAir signal to be connected to PMOD P11-1 at FPGA pin AC18 (you can find it here) instead of using AXI4-lite. I know, this information can hardly be found in the documentation.
The IO Standard is set to a default setting for External Ports which is LVCMOS25 in this case. You will get a xdc-file:
For the carrier what I have I could also find the xdc on ADI GitHub. The default iostandard we use for external ports is the one from the FMC connector. You don't have such a connector but 162 User-IO pins. The xdc file for the BOB shows FPGA regular IOs where P2 and P13 use the same iostandard (the upper and lower long User-IO pins on your image).
thanks for the quick response , in addition to the question earliar i notice in the xdc file that the p2 port are set to lvcmos25 ? can i set the p2 to be lvcmos33 instead ?
You can also select a web site from the following list
How to Get Best Site Performance
Select the China site (in Chinese or English) for best site performance. Other MathWorks country sites are not optimized for visits from your location.