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how to create bit vector depending on another bit vector ?

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hi, I have 20 bits in a vector (binary bits): for example, start from:
TMP_reg = [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0];
TMP_reg = [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1];
TMP_reg = [0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1];
..
..
end at:
TMP_reg = [1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1];
I want to produce another bits vector that depends on TMP_reg.
The new vector will be 40 bits vector on condition like that:
  1. For every bit that equal to 1 in TMP_reg, the New_reg will be 1 0 (as long as TMP_reg bit is 1).
  2. For every bit that equal to 0 in TMP_reg the New_reg will be 0 1 (as long as TMP_reg bit is 0).
Any suggestion how to do it?
Thanks,
Henry
  1 Comment
Steven Lord
Steven Lord on 2 Mar 2016
It's not clear what you're looking for. Let's take smaller examples.
What do you want New_reg to be for TMP_reg equal to [1 0 1 1 0 0] and why?
What do you want New_reg to be for TMP_reg equal to [1 1 1 1 1 1] and why?
What do you want New_reg to be for TMP_reg equal to [0 0 0 0 0 0] and why?

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Accepted Answer

Guillaume
Guillaume on 2 Mar 2016
One possible way:
bitpatterns = {[0 1], [1 0]}; %in the order pattern for 0, pattern for 1
TMP_reg = [0 0 1 0 1 1 0]; %length does not matter
TMP_2 = cell2mat(bitpatterns(TMP_reg + 1)) %add 1 to TMP_reg to create indices 1 or 2 used to index bitpatterns
  6 Comments
Guillaume
Guillaume on 3 Mar 2016
Why bother generating TMP_reg in your function if it's only a temporary variable? You may as well generate the final output directly:
function gate_h = gate_array(I_H, indx_h)
gate_h = [repmat([1 0], 1, indx_h), repmat([0 1], 1, 20-indx_h)];
if I_H > 0
gate_h = fliplr(gate_h);
end
end
This also avoids the cell array which appears to cause problem with Simulink.
I know nothing about Simulink, so no idea if it'll be happy with the above.
Henry Buck
Henry Buck on 3 Mar 2016
Graet,
I will forward your answer(by your permition..) to someone who knows how to convert it into Simulink models, hopefully...

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