regarding problem while generating vhdl code from simulink
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Mohammed Shameem Hussain
on 8 Apr 2016
Commented: Mohammed Shameem Hussain
on 9 Apr 2016
Hello,
I have generated simulink blocks from verilog files by using "cosimWizard". Now after connection I am trying to generate vhdl/verilog code via hdl coder. But while simulating I get follwing error
HDL Cosimulation Block Error
Error reported by S-function 'shdlcosim' in 'PingPong/PingPong/VGA_Controller/S-Function':
Failed to connect to server. Make sure the loaded HDL simulator library is using shared memory
Error reported by S-function 'shdlcosim' in 'PingPong/PingPong/VGA_Controller/S-Function':
Failed to connect to server. Make sure the loaded HDL simulator library is using shared memory
and while using fixed point solver I get
Error reported by S-function 'shdlcosim' in ' PingPong/PingPong/VGA_Controller/S-Function ':
Handshaking with the server failed - Server was NOT an 'HDL Link' server, change the port
also while generating code from hdl coder I get
Error reported by S-function 'shdlcosim' in 'PingPong/PingPong/VGA_Controller/S-Function': Failed to connect to server. Make sure the loaded HDL simulator library is using shared memory
I am using shared memory option in for the connection
Please let me know what can I do to solve it.
thanks in advance
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Accepted Answer
Tim McBrayer
on 8 Apr 2016
You cannot generate code from a Cosimulation block. The purpose of this block is to take existing HDL code and simulate it with the rest of you Simulink model. You have the HDL code, sitting on disk; there is no need to generate anything. If you are trying to incorporate it into a larger design, you will need to make sure that ModelSim is loaded with the compiled code, is up and running, and is the only instance of ModelSim running. Otherwise, Simulink may not be able to communicate with your instance.
For more information, please see the HDL Verifier and HDL Coder documentation.
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