How to implement an asynchronous FIFO/data buffer in Simulink?

Hello,

I am working on a model which will packetize data at rate A and occasionally send data at rate B, in which rate B is 3.125x faster than rate A. However, it's unclear to me how I can design my model in Simulink such that it can support rates A & B independently.

In other words, I want to implement the equivalent of an HDL FIFO such that the output & input sample times are not a clean ratio of N or 1/N.

Any suggestions would be greatly appreciated, thank you.

-Gilbert

Answer 1

[Gilbert Zhao]

Got around this issue by implementing an asynchronous FIFO outside of Simulink.

Answer 2

[Samatha Aleti]

Hi,

According to my understanding you would like to send data at 2 different rates independently. To do this you may use a “Rate transition block”. Assuming ”A” be the sample time of data generator (that you used), sample time of Rate Transition block should be 1/3.125 times that of “A” (in order to be 3.125 faster than “A”). Also make sure to uncheck the rate transition block parameter “Ensure deterministic data transfer”.

Answer 3

[Satheesh Appukuttan]

Hi,

I have some basic questions related to FIFO. I need to implement a fifo in simulink and shift the data for each clock cycle. is there a example implementation ?

1. Can I use from workspace to shift the values into fifo ?
2. What clock models should be used to pop/push signals.
3. What should be the sample time of the from work space ?