Generating HDL code error in the example "HDL Optimized QPSK Receiver with Captured Data"

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BUMHEE LEE on 10 Apr 2020

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https://ch.mathworks.com/matlabcentral/answers/517011-generating-hdl-code-error-in-the-example-hdl-optimized-qpsk-receiver-with-captured-data

Commented: Kiran Kintali on 18 Apr 2020

I am doing the example for "HDL Optimized QPSK Receiver with Captured Data"(https://www.mathworks.com/help/comm/examples/hdl-optimized-qpsk-receiver-with-captured-data.html)

and got a below message.

1) Generating DUT using verilog was successful. (Default language was set to VDHL)

2) Generating Test bench was failed.

How can I fix it? Could you help me?

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Answers (1)

Kiran Kintali on 12 Apr 2020

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https://ch.mathworks.com/matlabcentral/answers/517011-generating-hdl-code-error-in-the-example-hdl-optimized-qpsk-receiver-with-captured-data#answer_425573

This is a bug in HDL test bench generation. Please reach out to support@mathworks.com with reproduction steps.

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Kiran Kintali on 18 Apr 2020

What version of MATLAB you are using when you encountered this error? Thanks.

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