Statistics
RANK
171
of 265,262
REPUTATION
598
CONTRIBUTIONS
3 Questions
566 Answers
ANSWER ACCEPTANCE
100.0%
VOTES RECEIVED
78
RANK
134 of 18,128
REPUTATION
8,721
AVERAGE RATING
3.90
CONTRIBUTIONS
19 Files
DOWNLOADS
53
ALL TIME DOWNLOADS
86565
RANK
of 116,496
CONTRIBUTIONS
0 Problems
0 Solutions
SCORE
0
NUMBER OF BADGES
0
CONTRIBUTIONS
0 Posts
CONTRIBUTIONS
0 Public Channels
AVERAGE RATING
CONTRIBUTIONS
0 Highlights
AVERAGE NO. OF LIKES
Accept 20 answers given by other contributors
Awarded to Kiran Kintali on 25 Sep 2022
Contribute at least one answer each month for 36 consecutive months
Awarded to Kiran Kintali on 02 Jul 2022
100 of your answers have been accepted
Awarded to Kiran Kintali on 23 Mar 2022
Your submissions were downloaded 100 or more times in a month
Awarded to Kiran Kintali on 01 Apr 2021
Answer 50 questions that were unanswered for more than 30 days
Awarded to Kiran Kintali on 01 Nov 2020
Your submissions received 10 five star ratings
Awarded to Kiran Kintali on 21 Jun 2020
Publish your first review
Awarded to Kiran Kintali on 09 Oct 2019
Publish your first submission
Awarded to Kiran Kintali on 09 Oct 2019
Provide your first answer ever to someone else's question
Awarded to Kiran Kintali on 20 Jul 2017
Content Feed
Use of DSP systems toolbox and computer vision toolbox with HDL coder
You can use this command to view the HDL Comptible Blocks. >> hdllib
6 days ago | 0
HDLcoder ignores coder.const
You can find examples of HDL Coder friendly designs with coder.load and coder.const in the attachment.
8 days ago | 0
MATLAB HDL Coder build error: C compiler produced errors
You can use this helper command to copy any of the HDL Coder friendly MATLAB demo files matlab\toolbox\hdlcoder\hdlcoderdemos\ma...
8 days ago | 0
How do I find the peak of a signal and the time of peak?
Sharing HDL Coder compatible Peak Detector example here. https://www.mathworks.com/matlabcentral/fileexchange/69651-hdl-coder-s...
8 days ago | 0
RAM based circular shift register in Simulink
If you are looking to model delay length via input port using RMA you could use the following style of modeling pattern. ...
8 days ago | 0
run Simscape HDL Workflow Advisor from script
>> type matlab/toolbox/hdlcoder/hdlcoderdemos/simscapehdldemos/getSSC2HDLSynthesisResults.m This example file shows the workf...
25 days ago | 0
dsp.fft system object unbounded in a for loop
The functions fft() and dsp.fft() do not support HDL streaming interface. You can consider using dsphdl.fft or build a custom F...
26 days ago | 0
Build Standalone application for Zynq 706
There are several product examples that show case how to deploy HDL Coder generated code to target ZC706 board. Check this exam...
26 days ago | 1
Simulink DSP Simulations with Noise: Looking for best practices
You might want to get started with this HDL Coder Evaluation Reference Guide https://www.mathworks.com/matlabcentral/fileexch...
26 days ago | 1
Why do I get the error: " FIL cosimulation failed: the output does not match the expeced result" when I run FPGA-in-the-Loop Test?
If the HDL Code you are running is run with is generated from HDL Coder and is not matching the MATLAB or Simulink testbench the...
26 days ago | 0
dsp.FFT does not work with HDL coder
dsphdl.FFT ships with DSP HDL Toolbox. You can also find some examples of how to write custom FFT in MATLAB suitable for HDL Co...
27 days ago | 0
| accepted
I2C Master block in SOC FPGA
Please find attached a sample example of I2C Master and Slave model blocks with behavioral plant models for IMUs. You can also ...
1 month ago | 0
| accepted
how to use I2C master block in HDL Code
Please find attached a sample example of I2C Master and Slave model blocks with behavioral plant models for IMUs. You can also ...
1 month ago | 0
How to access HDL coder in Matlab trial version for college use ?
Reach out to support team for trial/install issues.
1 month ago | 0
face this error when wanna generate HDL coder "The Block/HDLImplementation pair: ('built-in/Reference', 'Module') is not registered in the implementation database."
Please reach out to support@mathworks.com This seems to be some sort of installation issue.
1 month ago | 0
PWM IP core FPGA
You can use core Simulink blocks to build a waveform of your choice.
1 month ago | 0
| accepted
HDL QAM Transmitter and Receiver simulation problem
Please reach out to tech support for further support on this question. Thanks
2 months ago | 0
Pipelining using HDL Coder
Can you share some sample code and the project file? if the critical path is within optimized IP such as hdl.FFT distributed pi...
2 months ago | 0
How to solve Algebric loop error without adding delay.
HDL Coder supports various memory interfaces including AXI4 and DDR memory access. https://www.mathworks.com/help/hdlcoder/ug/p...
2 months ago | 0
How to use signed bitconcat and bitsliceget?
The bitwise operator functions such as bitsliceget and bitconcat operate on underlying stored integer bits. Once bitwise operat...
2 months ago | 0
Problem in generating reusable Verilog code using Simulink HDL Coder
Feel free to reach out to technical support for this question. You may want to try to use the new subsystem reuse algorithm ava...
2 months ago | 0
Fast compilation Simulink Model : Recommeded Configuration of PC
It would be best to reach out to MathWorks support on this question.
2 months ago | 0
Usage of HDL and HLS blocks in same SystemGenerator for DSP design
can you share your model? Are you looking for a solution similar to this? https://www.mathworks.com/help/hdlcoder/ug/using-xil...
2 months ago | 0
How to serialize an HDL Coder function with a vector input ?
Can you share you algorithm? You would need to share a design.m and a testbech.m files. Thanks
3 months ago | 0
fixed point taylor sine/cosine approximation model
HDL Coder supports code generation for single precision trigonometric functions. Getting Started with HDL Coder Native Floatin...
3 months ago | 0
Which versions of Xilinx Vivado are supported with which release of HDL Workflow Advisor?
https://www.mathworks.com/help/hdlcoder/supported-hardware.html The supported official versions of Simulation and Synthesis too...
3 months ago | 0
Bitstream generation problem in HDL coder
Is it possible to attach a sample model? Feel free to reach out to MathWorks technical support on this question.
3 months ago | 0
up sample Simulink doesn't implement rate convertion on hdl coder
Please share your model. I do not see any such errors with a basic model with your sample settings.
3 months ago | 0
Can HDL coder produce code for unit delay with initial condition input
This feature is not currently supported and is on the future HDL Coder roadmap. For the block 'model/DUTSubsystem/Delay' ...
3 months ago | 0
PMSM is programed in FPGA using HDL coder.
In the motor control demo project the current control algorithm and speed control runs on FPGA and processor respectively and th...
4 months ago | 0
| accepted
You can also select a web site from the following list:
Americas
- América Latina (Español)
- Canada (English)
- United States (English)
Europe
- Belgium (English)
- Denmark (English)
- Deutschland (Deutsch)
- España (Español)
- Finland (English)
- France (Français)
- Ireland (English)
- Italia (Italiano)
- Luxembourg (English)
- Netherlands (English)
- Norway (English)
- Österreich (Deutsch)
- Portugal (English)
- Sweden (English)
- Switzerland
- United Kingdom (English)
Asia Pacific
- Australia (English)
- India (English)
- New Zealand (English)
- 中国
- 日本Japanese (日本語)
- 한국Korean (한국어)