This tutorial will guide you through the steps necessary to implement a MATLAB algorithm in FPGA hardware, including:
* Create a streaming version of the algorithm using Simulink
* Implement the hardware architecture
* Convert the design to fixed-point
* Generate and synthesize the HDL code
Jack Erickson (2019). HDL Coder Self-Guided Tutorial (https://www.mathworks.com/matlabcentral/fileexchange/69651-hdl-coder-self-guided-tutorial), MATLAB Central File Exchange. Retrieved .
Hi Suranga - thanks for pointing that out. In 2019a Simulink changed the way it names the simulation workspace data. We have updated the kit for 2019a.
The example doesn't work with 2019a. I get the error "Undefined variable "logsout" or class "logsout.getElement"" when trying to run the model.
Figured out the answer to my own question - posting in case some one else makes the same mistake. I used the first simulink "from workspace" I saw. That block , from a comment in this link https://uk.mathworks.com/matlabcentral/answers/359452-error-input-uint8-simulink "From Workspace blocks are not able to import "just plain data". From Workspace blocks are intended to deliver data at a particular time: they are blocks for execution of a model, where as importing plain data is something that would be used in a procedural language.”".
As it turns out there are two simulink from workspace block. One specifies “signal from workspace” and can be used to import “just plain data”.
Summarily, make sure to use "signal from workspace". You'll get an error otherwise.
Very helpful step-by-step guide for users new to HDL Coder.
Updated for R2019a
Minor edits to two slides
Updated for R2018b