HDL Coder Support Package for Xilinx RFSoC Devices

Generate code for the FPGA portion of RFSoC devices


Updated Wed, 13 Sep 2023 00:00:00 +0000

This support package includes reference designs for popular RFSoC development kits, so you can generate HDL code and port mappings to I/O and AXI registers to interface with RF tiles and DDR memory, and interactively control the FPGA design from MATLAB.

You can use SoC Blockset for system-level modeling of RFSoC devices, configuration of custom RFSoC-based boards, and deployment of complete SoC applications, including executables for ARM Cortex-A53 processors.

This support package is functional for R2021a and beyond.

For R2021a, to access the documentation for this support package, use the following commands in MATLAB:

MATLAB Release Compatibility
Created with R2021a
Compatible with R2021a to R2023b
Platform Compatibility
Windows macOS (Apple silicon) macOS (Intel) Linux
Tags Add Tags

Inspired: Avnet RFSoC Explorer

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!