SerDes Toolbox

Design SerDes systems and generate IBIS-AMI models for high-speed digital interconnects

SerDes Toolbox™ provides a MATLAB^® and Simulink^® model library and a set of analysis tools and apps for the design and verification of serializer/deserializer (SerDes) systems.

With the SerDes Designer app, you can use statistical analysis to rapidly design wired communications transmitters and receivers. The app provides MATLAB based parameterized models and algorithms that let you explore a wide range of equalizer configurations and generate eye diagrams to assess performance metrics.

With building blocks such as CTLE, DFE, FFE, and CDR, you can describe your chosen architecture and simulate control and adaptation algorithms. White-box examples of typical applications such as PCIe, USB, Ethernet, and DDR provide reference designs that you can use as a basis for your own designs.

SerDes Toolbox supports automatic generation of dual IBIS-AMI models. These models can be used with third-party channel simulators for system integration and verification.

SerDes Design

Design SerDes systems using parametrized white-box models and algorithms.

SerDes Designer App

Design, configure, and analyze SerDes systems using the SerDes Designer app. Check performance metrics using reports, eye diagrams, bathtub curves, and other visualizations. Generate Simulink and IBIS-AMI models for further refinement and verification. Use MATLAB to automate design and analysis.

Learn about the SerDes Designer app

Design SerDes System and Export IBIS-AMI Model

The SerDes Designer app.

Building Blocks for Adaptive Equalizers

Use white-box models such as DFE, CTLE, AGC, and CDR to develop adaptive equalizers. Use parametrized blocks and algorithms for single-ended and differential signals. Generate pseudorandom binary sequences (PRBS) and custom stimulus patterns supporting PAM4 and NRZ modulation.

Blocks for Designing and Simulating SerDes Systems

Simulink building blocks for SerDes design.

SerDes Analysis and Simulation

Perform statistical analysis with the SerDes Designer app and create a Simulink model for the addition of time-domain simulation.

Statistical Analysis

Perform statistical analysis to compute and visualize eye-contours, bit error rates (BER), bathtub curves, and other metrics using the SerDes Designer app. Explore the design space of your equalization algorithms and channels until you meet the specifications.

Fundamentals of SerDes Systems

Statistical analysis of PAM4 SerDes system.

Time-Domain Simulation

Perform time-domain simulation of adaptive algorithms using customizable Simulink blocks and channel models that capture frequency-dependent attenuation, reflections, and arbitrary impulse responses.

Construct loss model from channel loss metric or impulse response

Decision feedback equalizer (DFE) with clock and data recovery (CDR)

Simulink model generated with the SerDes Designer app for time-domain simulation. System-level configuration (left) and channel parameters (right).

IBIS-AMI Model Generation

Generate standard-compliant IBIS-AMI models to use in third-party channel simulators.

Dual Model Generation

Generate IBIS-AMI statistical (Init) and time-domain (GetWave) algorithmic models with associated analog IBIS models. Customize the model interface by managing IBIS-AMI parameters from the SerDes Designer app and Simulink.

Industry Standard IBIS-AMI Models

The IBIS-AMI parameter manager allows customization of the generated IBIS-AMI model.

Integration with Third-Party Channel Simulators

Import generated IBIS-AMI models into third-party channel simulators such as SiSoft QCD and QSI, Keysight™ ADS, Synopsys^®HSPICE, Mentor Graphics^® HyperLynx^®, Cadence^® Sigrity SystemSI. Use IBIS-AMI models in your verification flow and share them with customers.

Leveraging SerDes Design Flows for IBIS-AMI Model Development (30:42)

QCD simulation results of IBIS-AMI model generated with the SerDes Designer app.

Reference Designs

Use white-box blocks to model industry standard communication protocols such as PCI Express, DDR memory, and Ethernet.

Standards-Compliant Reference Models

Use standards-compliant reference designs of PCIe Gen4, DDR5, and OIF CEI-56G. Get started with reference models and refine them to design next-generation communication protocols using NRZ and higher-order modulation schemes such as PAM4.

PCIe4 Transmitter/Receiver IBIS-AMI Model