SerDes Toolbox

Design SerDes systems and generate IBIS-AMI models for high-speed digital interconnects

SerDes Toolbox™ provides a MATLAB^® and Simulink^® model library and a set of analysis tools and apps for the design and verification of serializer/deserializer (SerDes) systems or high-speed memory PHYs such as DDR5.

With the SerDes Designer app, you can use statistical analysis to rapidly design wired communications links. The app provides parameterized models and algorithms that let you explore a wide range of equalizer configurations to improve channel performance. You can assess metrics such as eye diagram, bathtub curve, and channel operating margin (COM), including the effects of jitter and crosstalk.

With MATLAB based building blocks such as CTLE, DFE, FFE, and CDR, you can describe your chosen architecture using datasheets or measurement data and simulate control and adaptative algorithms. White-box examples of typical applications such as PCIe, USB, Ethernet, and DDR provide reference designs that you can use as a basis for your own designs.

SerDes Toolbox supports automatic generation of dual IBIS-AMI models for statistical analysis and time-domain simulation. These models can be used with channel simulators for system integration and verification.

What Is SerDes Toolbox?

TECHNICAL ARTICLE

DfA (Design for AMI): A New Integrated Workflow for Modeling 56G PAM4 SerDes Systems

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SerDes Design

Design SerDes systems using parametrized white-box models and algorithms.

SerDes Designer App

Design, configure, and analyze SerDes systems using the SerDes Designer app. Model channel attenuation, dispersion, jitter, and crosstalk. Check performance metrics such as channel operating margin (COM), using reports, eye diagrams, bathtub curves, and other visualizations. Use MATLAB to automate analysis, reporting, and design space exploration. Generate Simulink and IBIS-AMI models for further refinement and verification.

Learn about the SerDes Designer App

Design SerDes System and Export IBIS-AMI Model

Find Zeros, Poles, and Gains for CTLE from Transfer Function

SerDes Designer app for PAM4 system including adaptive CTLE and DFE.

PAM 4 SerDes system including adaptive CTLE and DFE.

Adaptive Equalizer Design

Use DFE, CTLE, FFE, AGC, and CDR to design adaptive equalizers. Use parametrized blocks and algorithms for single-ended and differential signals.

Starting with the white-box implementation, customize models with your own algorithms.

Explore local and global adaptation strategies to optimize your system performance, and generate IBIS-AMI models.

ADC IBIS-AMI Model Based on COM

Best Practices for Modeling PAM4 SerDes Systems and Improving IBIS-AMI Correlation (23:04)

Customizing Datapath Building Blocks

Implement Custom CTLE in SerDes Toolbox PassThrough Block

Modeling SerDes CTLE Using Transfer Function Data

SerDes Analysis and Simulation

Perform statistical analysis with the SerDes Designer app and create a Simulink model for time-domain simulation.

Statistical Analysis

Perform statistical analysis to compute and visualize eye contours, bit error rates (BER), bathtub curves, COM, and other metrics using the SerDes Designer app.

Explore the design space of your equalization algorithms and channels using PAM4, PAM3, and NRZ modulations.

Fundamentals of SerDes Systems

Analog Channel Loss in SerDes System

Globally Adapt Receiver Components Using Pulse Response Metrics to Improve SerDes Performance

Statistical analysis of a PAM4 SerDes system.

Simulink report of PAM4 SerDes system statistical analysis.

Time-Domain Simulation

Perform time-domain simulation of adaptive algorithms using customizable Simulink blocks and channel models that capture frequency-dependent attenuation, reflections, and arbitrary impulse responses.

Verify your equalization algorithms using pseudorandom binary sequences (PRBS) and custom stimulus patterns.

Globally Adapt Receiver Components in the Time Domain

Construct Loss Model from Channel Loss Metric or Impulse Response

Convert Scattering Parameter to Impulse Response for SerDes System

Decision Feedback Equalizer (DFE) with Clock and Data Recovery (CDR)

Simulink model generated with the SerDes Designer app for time-domain simulation.

IBIS-AMI Model Generation

Generate standard-compliant IBIS-AMI models for use in third-party channel simulators.

Dual Model Generation

Generate IBIS-AMI statistical (Init) and time-domain (GetWave) algorithmic models with associated analog IBIS models. Customize the model interface by managing IBIS-AMI parameters from the SerDes Designer app and Simulink.

PCIe5 Transmitter/Receiver IBIS-AMI Model

Industry Standard IBIS-AMI Models

Managing AMI Parameters

Customizing SerDes Toolbox Datapath Control Signals

Design for AMI - A New Integrated Workflow for Modeling High-Speed PAM4 SerDes Systems

Channel Analysis and IBIS-AMI Simulation

Use the Signal Integrity Link to export IBIS-AMI models into Signal Integrity Toolbox for analyzing serial links and parallel interfaces. Verify IBIS-AMI models with statistical and time-domain simulations, explore the design space, and prove standard compliance. Optimize your SerDes design by importing back corner cases including stimuli, AMI parameters, and channel models.

You can also use the generated IBIS-AMI models with third-party channel simulators such as Keysight™ ADS, Synopsys^® HSPICE, Mentor Graphics^® HyperLynx^®, and Cadence^® Sigrity SystemSI.

Signal Integrity Toolbox

Analyze Backplane with Line Cards - MATLAB & Simulink

Equalized 100GBASE-KR Eye Diagram obtained with Signal Integrity Toolbox

Reference Designs

Use white-box blocks to model industry-standard communication protocols such as PCI Express, DDR, and Ethernet.

Standard-Compliant Reference Models

Use standard-compliant reference designs of PCIe Gen4, DDR5, and OIF CEI-56G. Get started with reference models and refine them to design next-generation communication protocols using NRZ and higher-order modulation schemes such as PAM3 and PAM4. Generate standard-compliant IBIS-AMI models for verification.

PCIe5 Transmitter/Receiver IBIS-AMI Model

PCIe4 Transmitter/Receiver IBIS-AMI Model

Design DDR5 IBIS-AMI Models to Support Back-Channel Link Training

USB3.1 Transmitter/Receiver IBIS-AMI Model

CEI-56G-LR Transmitter/Receiver IBIS-AMI Model