During this presentation, we will demonstrate how to:
- Model and simulate FOC motor control algorithms in Simulink to evaluate algorithms before testing in hardware
- Perform algorithmic HDL code generation from Simulink models.
- Produce FPGA implementation of algorithm using Microsemi Libero SoC design tools.
- Use FPGA-in-the-Loop simulation on a Microsemi PolarFire Evaluation Kit or a Microsemi SmartFusion2 Advanced Development Kit (boards displayed in image above) to verify the hardware implementation corresponds to the initial Simulink specification model.
About the Presenters
Eric Cigan is a Principal Product Marketing Manager for HDL products at MathWorks. Prior to joining MathWorks, he held technical marketing roles at MathStar, AccelChip, and Mentor Graphics, and his technical interests include use of FPGAs and SoC FPGAs in control system applications. Eric earned BS and MS degrees in mechanical engineering from the Massachusetts Institute of Technology.
Puneet Kumar is a Defense Vertical Marketing Manager at Microsemi India. Prior to joining Microsemi, Puneet held technical roles at MathWorks, Cadence, CoWare, and Synopsys, and his technical interests include use of FPGAs and SoC FPGAs in signal processing, communication systems and vision applications. Puneet holds a bachelor’s degree in electronic engineering from the University of Pune and a master’s degree in electrical engineering from the University of South Florida.