Deep Learning HDL Toolbox
R2026bDeep Learning HDL Toolbox™ provides functions and tools for prototyping and implementing deep learning networks on FPGAs and SoCs. It provides pre-built bitstreams for running deep learning networks on supported FPGAs and SoCs (with SoC Blockset™ for AMD devices and HDL Coder™ for Altera® devices). Profiling and estimation tools enable you to customize a deep learning network by exploring design, performance, and resource utilization tradeoffs.
You can use the toolbox for customizing the hardware implementation of your deep learning network. Also, you can generate portable, synthesizable Verilog®, SystemVerilog, and VHDL® code for deployment on any FPGA or SoC devices (with HDL Coder and Simulink®).
Get Started
Learn the basics of Deep Learning HDL Toolbox
Prototype Deep Learning Networks on FPGA
Estimate performance of series networks. Profile and retrieve inference results from target devices using MATLAB®
Time Series and Sequence Data Networks
Deploy networks trained for time series classification, regression, and forecasting tasks to target FPGA and SoC boards
Deep Learning Processor Customization and IP Generation
Configure, build, and generate custom bitstreams and processor IP cores, estimate and benchmark custom deep learning processor performance
System Integration of Deep Learning Processor IP Core
Generate the deep learning (DL) processor IP core by using HDL Coder and Deep Learning HDL Toolbox
Deep Learning INT8 Quantization
Calibrate, validate, and deploy quantized pretrained series deep learning networks
