Copy or invert one scalar input, or collapse one nonscalar input
Simulink / Math Operations
HDL Coder / HDL Floating Point Operations
HDL Coder / Math Operations
The Product of Elements block inputs one scalar, vector, or matrix. You can use the block to:
Copy a scalar input unchanged
Invert a scalar input (divide 1 by it)
Collapse a vector or matrix to a scalar by multiplying together all elements or taking successive inverses of the elements
Collapse a matrix to a vector using one of these options:
Multiply together the elements of each row or column
Take successive inverses of the elements of each row or column
The Product of Elements block is functionally a Product block that has two preset parameter values:
Multiplication:
Elementwise(.*)
Number of inputs: *
Setting nondefault values for either of those parameters can change a Product of Elements block to be functionally equivalent to a Product block or a Divide block.
Port_1
— First input to multiply or divideFirst input to multiply or divide, provided as a scalar, vector, matrix, or ND array.
Data Types: half
 single
 double
 int8
 int16
 int32
 int64
 uint8
 uint16
 uint32
 uint64
 Boolean
 fixed point
Port_N
— Nth input to multiply or divideNth input to multiply or divide, provided as a scalar, vector, matrix, or ND array.
Data Types: half
 single
 double
 int8
 int16
 int32
 int64
 uint8
 uint16
 uint32
 uint64
 Boolean
 fixed point
X
— Input signal to multiplyInput signal to be multiplied with other inputs.
To enable one or more X ports, specify one or
more *
characters for the Number of
inputs parameter.
Data Types: half
 single
 double
 int8
 int16
 int32
 int64
 uint8
 uint16
 uint32
 uint64
 Boolean
 fixed point
÷
— Input signal to divide or invertInput signal for division or inversion operations.
To enable one or more ÷ ports, specify one or
more /
characters for the Number of
inputs parameter.
Data Types: half
 single
 double
 int8
 int16
 int32
 int64
 uint8
 uint16
 uint32
 uint64
 Boolean
 fixed point
Port_1
— Output computed by multiplying, dividing, or inverting inputsOutput computed by multiplying, dividing, or inverting inputs.
Data Types: half
 single
 double
 int8
 int16
 int32
 int64
 uint8
 uint16
 uint32
 uint64
 Boolean
 fixed point
Number of inputs
— Control number of inputs and type of operation*
(default)  positive integer scalar  *
or /
for each input
portControl two properties of the block:
The number of input ports on the block
Whether each input is multiplied or divided into the output
When you specify:
1
or
*
or
/
The block has one input port. In elementwise mode, the block
processes the input as described for the Product of
Elements block. In matrix mode, if the parameter
value is 1
or *
, the block
outputs the input value. If the value is /
,
the input must be a square matrix (including a scalar as a
degenerate case) and the block outputs the matrix inverse. See
ElementWise Mode and Matrix Mode for more
information.
Integer value > 1
The block has the number of inputs given by the integer value. The inputs are multiplied together in elementwise mode or matrix mode, as specified by the Multiplication parameter. See ElementWise Mode and Matrix Mode for more information.
Unquoted string of two or more
*
and /
characters
The block has the number of inputs given by the length of the
character vector. Each input that corresponds to a
*
character is multiplied into the
output. Each input that corresponds to a /
character is divided into the output. The operations occur in
elementwise mode or matrix mode, as specified by the Multiplication parameter. See ElementWise Mode and Matrix Mode for more
information.
Block Parameter:
Inputs 
Type: character vector 
Values:
'2'  '*'  '**'  '*/'  '*/*' 
... 
Default:
'*' 
Multiplication
— Elementwise (.*) or Matrix (*) multiplicationElementwise(.*)
(default)  Matrix(*)
Specify whether the block performs Elementwise(.*)
or
Matrix(*)
multiplication.
Block Parameter:
Multiplication 
Type: character vector 
Values:
'Elementwise(.*)'  'Matrix(*)' 
Default:
'Elementwise(.*)' 
Multiply over
— All dimensions or specified dimensionAll dimensions
(default)  Specified dimension
Specify the dimension to multiply over as All
dimensions
, or Specified
dimension
.
When you select All dimensions
and select configuration
parameter Use algorithms optimized for rowmajor array
layout, Simulink^{®} enables rowmajor algorithms for simulation. To generate
rowmajor code, set configuration parameter Array layout (Simulink Coder) to
Rowmajor
in addition to selecting
Use algorithms optimized for rowmajor array
layout. The columnmajor and rowmajor algorithms differ
only in the multiplication order. In some cases, due to different
operation order on the same data set, you might experience minor numeric
differences in the outputs of columnmajor and rowmajor
algorithms.
When you select Specified dimension
, you
can specify the Dimension as 1
or 2
.
To enable this parameter, set Number of
inputs to *
and
Multiplication to Elementwise
(.*)
.
Block Parameter:
CollapseMode 
Type: character vector 
Values:
'All dimensions'  'Specified
dimension' 
Default:
'All dimensions' 
Dimension
— Dimension to multiply over1
(default)  2
 ...
 N
Specify the dimension to multiply over as an integer less than or equal to the number of dimensions of the input signal.
To enable this parameter, set:
Number of inputs to *
Multiplication to Elementwise (.*)
Multiply over to Specified dimension
Block Parameter: CollapseDim 
Type: character vector 
Values:
'1'  '2'  ... 
Default: '1' 
Sample time
— Specify sample time as a value other than 1
1
(default)  scalar  vectorSpecify the sample time as a value other than 1. For more information, see Specify Sample Time.
This parameter is not visible unless it is explicitly set to a value other than
1
. To learn more, see Blocks for Which Sample Time Is Not Recommended.
Block Parameter:
SampleTime 
Type: character vector 
Values: scalar or vector 
Default:
'1' 
Require all inputs to have the same data type
— Require that all inputs have the same data typeoff
(default)  on
Specify if input signals must all have the same data type. If you enable this parameter, then an error occurs during simulation if the input signal types are different.
Block Parameter:
InputSameDT 
Type: character vector 
Values:
'off'  'on' 
Default:
'off' 
Output minimum
— Minimum output value for range checking[]
(default)  scalarLower value of the output range that Simulink checks.
Simulink uses the minimum to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixedpoint data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).
Note
Output minimum does not saturate or clip the actual output signal. Use the Saturation block instead.
Block Parameter:
OutMin 
Type: character vector 
Values: '[ ]' 
scalar 
Default: '[ ]' 
Output maximum
— Maximum output value for range checking[]
(default)  scalarUpper value of the output range that Simulink checks.
Simulink uses the maximum value to perform:
Parameter range checking (see Specify Minimum and Maximum Values for Block Parameters) for some blocks.
Simulation range checking (see Specify Signal Ranges and Enable Simulation Range Checking).
Automatic scaling of fixedpoint data types.
Optimization of the code that you generate from the model. This optimization can remove algorithmic code and affect the results of some simulation modes such as SIL or external mode. For more information, see Optimize using the specified minimum and maximum values (Embedded Coder).
Note
Output maximum does not saturate or clip the actual output signal. Use the Saturation block instead.
Block Parameter:
OutMax 
Type: character vector 
Values: '[ ]' 
scalar 
Default: '[ ]' 
Output data type
— Specify the output data typeInherit: Inherit via internal
rule
(default)  Inherit: Inherit via back propagation
 Inherit: Same as first input
 double
 single
 int8
 uint8
 int16
 uint16
 int32
 uint32
 int64
 uint64
 fixdt(1,16)
 fixdt(1,16,0)
 fixdt(1,16,2^0,0)
 <data type expression>
Choose the data type for the output. The type can be inherited, specified
directly, or expressed as a data type object such as
Simulink.NumericType
. For more information, see
Control Signal Data Types.
When you select an inherited option, the block behaves as follows:
Inherit: Inherit via internal rule
— Simulink chooses a data type to balance numerical
accuracy, performance, and generated code size, while taking
into account the properties of the embedded target hardware.
If you change the embedded target settings, the data type
selected by the internal rule might change. For example, if
the block multiplies an input of type
int8
by a gain of
int16
and
ASIC/FPGA
is specified as
the targeted hardware type, the output data type is
sfix24
. If
Unspecified (assume 32bit
Generic)
, in other words, a generic
32bit microprocessor, is specified as the target hardware,
the output data type is int32
. If none of
the word lengths provided by the target microprocessor can
accommodate the output range, Simulink software displays an error in the Diagnostic
Viewer.
It is not always possible for the software to optimize code efficiency and numerical accuracy at the same time. If the internal rule doesn’t meet your specific needs for numerical accuracy or performance, use one of the following options:
Specify the output data type explicitly.
Use the simple choice of
Inherit: Same as
input
.
Explicitly specify a default data type such
as fixdt(1,32,16)
and then use
the FixedPoint Tool to propose data types for
your model. For more information, see fxptdlg
(FixedPoint Designer).
To specify your own inheritance rule, use
Inherit: Inherit via back
propagation
and then use a Data Type
Propagation block. Examples of how to use
this block are available in the Signal Attributes
library Data Type Propagation
Examples block.
Inherit: Inherit via back
propagation
— Use data type of the
driving block.
Inherit: Same as first input
— Use
data type of first input signal.
When input is a floatingpoint data type smaller than single
precision, the Inherit: Inherit via internal
rule
output data type depends on the setting
of the Inherit floatingpoint output type smaller than single precision configuration parameter. Data types are smaller than single
precision when the number of bits needed to encode the data type is
less than the 32 bits needed to encode the singleprecision data
type. For example, half
and
int16
are smaller than single
precision.
Block Parameter:
OutDataTypeStr 
Type: character vector 
Values: 'Inherit:
Inherit via internal rule 
'Inherit: Same as first input' 
'Inherit: Inherit via back
propagation'  'double'
 'single'  'int8' 
'uint8' 
'int16' 
'uint16' 
'int32' 
'uint32' 
'int64' 
'uint64' 
'fixdt(1,16)' 
'fixdt(1,16,0)' 
'fixdt(1,16,2^0,0)' 
'<data type
expression>' 
Default: 'Inherit:
Inherit via internal rule' 
Lock output data type setting against changes by the fixedpoint tools
— Prevent fixedpoint tools from overriding Output data typeoff
(default)  on
Select this parameter to prevent the fixedpoint tools from overriding the Output data type you specify on the block. For more information, see Use Lock Output Data Type Setting (FixedPoint Designer).
Block Parameter:
LockScale 
Type: character vector 
Values:
'off'  'on' 
Default:
'off' 
Integer rounding mode
— Rounding mode for fixedpoint operationsFloor
(default)  Ceiling
 Convergent
 Nearest
 Round
 Simplest
 Zero
Select the rounding mode for fixedpoint operations. You can select:
Ceiling
Rounds positive and negative numbers toward positive infinity. Equivalent
to the MATLAB^{®}
ceil
function.
Convergent
Rounds number to the nearest representable value. If a tie occurs, rounds
to the nearest even integer. Equivalent to the FixedPoint Designer™
convergent
function.
Floor
Rounds positive and negative numbers toward negative infinity. Equivalent
to the MATLAB
floor
function.
Nearest
Rounds number to the nearest representable value. If a tie occurs, rounds
toward positive infinity. Equivalent to the FixedPoint Designer
nearest
function.
Round
Rounds number to the nearest representable value. If a tie occurs, rounds
positive numbers toward positive infinity and rounds negative numbers toward
negative infinity. Equivalent to the FixedPoint Designer
round
function.
Simplest
Chooses between rounding toward floor and rounding toward zero to generate rounding code that is as efficient as possible.
Zero
Rounds number toward zero. Equivalent to the MATLAB
fix
function.
For more information, see Rounding (FixedPoint Designer).
Block parameters always round to the nearest representable value. To control the rounding of a block parameter, enter an expression using a MATLAB rounding function into the mask field.
Block Parameter:
RndMeth 
Type: character vector 
Values:
'Ceiling'  'Convergent'  'Floor'  'Nearest'  'Round'  'Simplest' 
'Zero' 
Default:
'Floor' 
Saturate on integer overflow
— Method of overflow actionoff
(default)  on
Specify whether overflows saturate or wrap.
Action  Rationale  Impact on Overflows  Example 

Select this check box ( 
Your model has possible overflow, and you want explicit saturation protection in the generated code. 
Overflows saturate to either the minimum or maximum value that the data type can represent. 
The maximum value that the 
Do not select this check box ( 
You want to optimize efficiency of your generated code. You want to avoid overspecifying how a block handles outofrange signals. For more information, see Troubleshoot Signal Range Errors. 
Overflows wrap to the appropriate value that is representable by the data type. 
The maximum value that the 
When you select this check box, saturation applies to every internal operation on the block, not just the output, or result. Usually, the code generation process can detect when overflow is not possible. In this case, the code generator does not produce saturation code.
Block Parameter: SaturateOnIntegerOverflow 
Type: character vector 
Values:
'off'  'on' 
Default: 'off' 
Data Types 

Direct Feedthrough 

Multidimensional Signals 

VariableSize Signals 

ZeroCrossing Detection 

The Product of Elements block uses these algorithms to perform elementwise operations on inputs of floatingpoint, builtin integer, and fixedpoint types.
Input  ElementWise Operation  Algorithm 

Real scalar,  Multiplication  y = u 
Division  y = 1/u  
Real vector or matrix with elements  Multiplication  y = u1*u2*u3*...*uN 
Division  y = ((((1/u1)/u2)/u3).../uN)  
Complex scalar,
 Multiplication  y = u 
Division  y = 1/u  
Complex vector or matrix with elements
 Multiplication  y = u1*u2*u3*...*uN 
Division  y = ((((1/u1)/u2)/u3).../uN) 
If the specified dimension for elementwise multiplication or division is a row or column of a matrix, the algorithm applies to that row or column. Consider this model.
The top Product of Elements block collapses the matrix input to a scalar by taking successive inverses of the four elements:
y = ((((1/2+i)/3)/4i)/5)
The bottom Product of Elements block collapses the matrix input to a vector by taking successive inverses along the second dimension:
y(1) = ((1/2+i)/3)
y(2) = ((1/4i)/5)
HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.
HDL Coder supports Tree
and
Cascade
architectures for Product or Product of
Elements blocks that have a single vector input with multiple elements.
This block has multicycle implementations that introduce additional latency in the generated code. To see the added latency, view the generated model or validation model. See Generated Model and Validation Model (HDL Coder).
Architecture  Additional cycles of latency  Description 

Linear
(default)  0  Generates a linear chain of adders to compute the sum of products. 
Tree  0  Generates a tree structure of adders to compute the sum of products. 
Cascade  1, when block has a single vector input port.  This implementation optimizes latency * area and is
faster than the See Cascade Architecture Best Practices (HDL Coder). 
Note
The Product of Element block does not support HDL code
generation with double
data types in the Native
Floating Point
mode.
If you use the block in matrix multiplication mode, you can specify the
DotProductStrategy. This setting determines whether you want to
implement the matrix multiplication by using a tree of adders and multipliers, or use the
MultiplyAccumulate block implementation. The default is Fully
Parallel
.
Note
The DotProductStrategy must be set to Fully
Parallel
when you use the Native Floating Point
mode.
For more information, see DotProductStrategy (HDL Coder).
See also Design Considerations for Matrices and Vectors (HDL Coder).
General  

ConstrainedOutputPipeline  Number of registers to place at
the outputs by moving existing delays within your design. Distributed
pipelining does not redistribute these registers. The default is

DSPStyle  Synthesis attributes for multiplier mapping. The default is 
InputPipeline  Number of input pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is

OutputPipeline  Number of output pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is

Native Floating Point  

HandleDenormals  Specify whether you want HDL Coder to insert additional logic to handle denormal numbers in your design.
Denormal numbers are numbers that have magnitudes less than the smallest floatingpoint
number that can be represented without leading zeros in the mantissa. The default is

LatencyStrategy  Specify whether to map the blocks in your design to 
NFPCustomLatency  To specify a value, set
LatencyStrategy to 
MantissaMultiplyStrategy  Specify how to implement the mantissa multiplication operation during code generation.
By using different settings, you can control the DSP usage on the target FPGA device.
The default is 
The default (linear) implementation supports complex data.
Complex division is not supported. For block implementations of the Product block in divide mode or reciprocal mode, see HDL Code Generation on the Divide block reference page.
Divide  Dot Product  Product
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