About HDL simulink coder for StateFlow

Dear friends, I have a Stateflow subsystem that i have used a event.The event is a trigger input with frequency = 400ns( I used Pulse Generator block in simulink ). I try to convert this subsystem to Verilog code by HDL simulink coder and it's have a error:

Error: Cannot support triggered sample time in 'Stateflow/Sub/400n/'

How can I solve this problem, Can you give me some ideal to convert my code.

Need for helping! Thanks alot!

Pham Van Dung

[Ali Alsaqqa]

I have the same problem.

[Tim McBrayer]

What kind of block has the error reported for it? Is the reported block from within a Stateflow chart? Is the Stateflow chart inside a triggered subsystem? Have you experimented with using an input event to the Stateflow chart instead of a triggered subsystem (if the latter is what you are doing?)

Answer 1

[Kiran Kintali]

Attached model describes how to model either edge in Stateflow suitable for HDL code generation.

HDL Verision

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